1. Field of the Invention
This invention relates to a semiconductor device composed of a semiconductor film having a crystalline structure formed over a glass substrate, in which a signal is transmitted by light interconnection.
2. Related Art
A thin film transistor (TFT) formed over an insulating substrate or an insulating film has advantageous features that it can be manufactured easier than an MOS transistor, which is formed over a silicon wafer, and it can be manufactured at low cost by using a large substrate. Especially, since a TFT in which an active layer is formed by a polysilicon film (polycrystalline TFT) has larger mobility than that of a TFT including amorphous silicon, it is expected that the polycrystalline TFT is not only applied to a display device or photoelectric conversion but also widely applied to a functional device including a field of an integrated circuit.
However, an electrical characteristic of a polycrystalline TFT cannot be comparable to that of an MOS transistor formed over a so-called single crystalline silicon wafer (single crystalline transistor). Especially, on current and mobility of a polycrystalline TFT is inferior to those of a single crystalline transistor due to defects in a grain boundary. Therefore, in case of manufacturing an integrated circuit by using a polycrystalline TFT, the increase of the size of a TFT cannot be prevented when sufficient on current is attempted to obtain. Moreover, it is difficult to draw microscopic pattern at high speed on a large glass substrate. The foregoing factors have prevented the high integration of an integrated circuit.
If high integration is incomplete in an integrated circuit, the length of wirings connecting each device is increased, and wiring resistance is also increased. The increase of wiring resistance leads to the delay of signals and the distortion of a waveform. Consequently, an amount of the transmittance of signals is decreased. Therefore, the performance of information processing of the integrated circuit is limited, and the development of a high performance integrated circuit capable of operating at high speed is prevented. In addition, parasitic capacity between wirings is increased with increasing the length of wirings. Accordingly, charge and discharge energy for wirings is increased, which leads to the increase of power consumption.
Integrally forming various semiconductor circuits over one glass substrate becomes a factor of lowering yields. Further, since an integrated circuit is composed of circuits, each of which has various functions, it can predict that each circuit requires different kinds of performance from a TFT. In order to obtain desirable performance, the structure of a TFT of each circuit over one substrate is optimized. However, the process becomes complicated and the number of process is increased. Hence, yields are lowered and it becomes difficult to reduce the time required for completing a product (TAT: Turn Around Time).
Further, when semiconductor circuits formed over a plurality of substrates are connected with each other by an FPC or the like, the reliability of a mechanical strength is lowered since the connecting portion is weak against physical shocks. Further, in case of connecting by an FPC or the like, the number of connection terminals and the generation ratio of connection inferiors are increased with the increase of an amount of information of signals to be processed by a semiconductor device. Additionally, the increase of the number of connection terminals with the increase of an amount of information of signals to be processed by a semiconductor device may lead to the problem that all of the connection terminals cannot be arranged at an edge of a substrate. However, it is undesirable that the area of a substrate is enlarged only for spacing to arrange the connection terminals since it may prevent the miniaturization of a semiconductor device.